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CAD Engineer - Timing for Transistor - Level Flows & Methodologies (m/f/d)

Stellenangebot von Apple

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Connecticum Job-Nr. 1341133 / 200203351
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  • Beschäftigungsarten: Junior Professional
    Senior Professional
    Arbeitgeber: Apple
    Jobdatum: 16. Dezember 2020
    Studienbereiche: Wirtschaftswissenschaften: Wirtschaftsinformatik, Wirtschaftsingenieurwesen
    Ingenieurwissenschaften: Elektrotechnik, Wirtschaftsingenieurwesen
    Informatik: Informatik, Technische Informatik, Wirtschaftsinformatik
    Einsatzorte: München; Bayern
    Stellenangebot: CAD Engineer - Timing for Transistor - Level Flows & Methodologies (m/f/d)

    CAD Engineer - Timing for Transistor - Level Flows & Methodologies (m/f/d)

    Munich Bavaria-Bayern Germany
    Hardware

    Summary

    Posted: 2. Nov 2020
    Role Number: 200203351
    Will you help us design future generations of revolutionary Apple products? The Silicon Engineering team is seeking a CAD Engineer with a strong foundation in Timing for Transistor-Level Flows & Methodologies and a real passion for building new technologies.

    At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game?

    We have an opportunity for a visionary and uncommonly talented CAD Engineer. As a member of our dynamic group, you will have the rare and exciting opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. In this role you will be responsible for defining, implementing, and supporting the methodologies, flows, and tools necessary to verify transistor-level circuits in the areas of timing, signal integrity and circuit verification. You will work very closely with digital and analog designers to ensure that their designs meet functionality, timing, electrical, power, and signal integrity goals.

    Key Qualifications

    • Typically requires at least 3+ years of hands-on experience in timing, STA, CAD/methodology, etc.
      Proficiency in STA and methodologies for timing closure, signal integrity analysis, cross-talk, and OCV (AOCV, POCV) effects, etc.
      Experience with transistor-level tools such as NanoTime, PathMill, HSPICE.
      Familiar with digital custom circuit designs including dynamic circuit techniques and memories as well as SPICE models and netlists.
      Programming in Perl, TCL, or similar language.
      Good communicator who can accurately describe issues and follow them through to completion.

    Description

    Work with design teams to understand and debug tool issues and constraints
    Build/maintain flows, scripts and methodologies for transistor-level analysis
    Work closely with design teams and CAD to drive timing, power, signal integrity, and functional verification closure efforts
    Deep analysis of timing paths to identify key issues
    Create documentation and help with guidelines/specs

    Education & Experience

    BS, MS preferred, degree in technical field

    Additional Requirements

    • Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action too offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, discuss their compensation or that of other applicants.
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Jobbezeichnung:

CAD Engineer - Timing for Transistor - Level Flows & Methodologies (m/f/d)

Jobkennzeichen: Connecticum-JobNr. 1341133 / 200203351
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