Stellenbeschreibung - Early Career - SoC Static Timing Analysis Engineer (M, F, D)
connecticum Job 1741966 / 200539457
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- General knowledge of the ASIC design timing closure flow and methodology.
- Understanding of STA and methodologies for timing closure, and have a good understanding of noise, cross-talk, and OCV effects, among others. - General knowledge in timing/SDC constraints generation and management. - Proficient in scripting languages (TCL and Perl). - Familiarity with synthesis, logic equivalence, DFT and backend related methodology and tools. - Understand and implement improving existing methodologies and flows. - Knowledge in constraint analysis and debug, using industry standard tools as well as backend STA closure is a plus. - Familiar with ECO techniques and implementation. - Some experience in ASIC timing constraints generation and timing closure. Expertise in STA tools (Primetime) and flow. - Familiar with hierarchical design approach, top-down design, timing and physical convergence. - Good communication and interaction with Front End teams and Physical Design teams. - Ability to fluently speak and write in English.
Responsibilities include especially, but are not limited to: - Work with Physical Design team, highlighting issues & best practices. - Help build timing ECO’s for project tapeout. - Build/maintain scripts and methodologies for analysis and runs.
You will be responsible for constraints and timing checkups development, including their delivery for synthesis, PnR and signoff STA. Working in parallel on blocks and chip level STA modes.
Bachelors's or Master's Degree in a technical field is required.
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Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Apple is a drug-free workplace
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Informationen zur Bewerbung
Stellenangebot:
Early Career - SoC Static Timing Analysis Engineer (M, F, D)
Jobkennzeichen:
Connecticum Job 1741966 / 200539457
Bereiche:
Wirtschaftswissenschaften:
Wirtschaftsinformatik, Wirtschaftsingenieurwesen
Ingenieurwissenschaften:
Elektrotechnik, Wirtschaftsingenieurwesen
Informatik:
Informatik, Technische Informatik, Wirtschaftsinformatik